Is there a “rule of thumb” for modeling back-drilled vias?  That is an excellent question.

Molex solutions are frequently used on PCB designs to test other products, such as backplanes and I/O connectors.  It is important to know how to get the clearest picture when testing coaxial connectors.  Signal integrity RF engineers at Molex hear from many customers requesting assistance when designing printed circuit board (PCB) launches for coaxial test connectors.

When conducting tests it is important to maximize test connector bandwidth and PCB launch in order to get the clearest picture of the intended device under test (DUT).  A good starting point is to play 20 questions.  Well, not quite, but I have developed a series of seven key questions that can help clarify what a customer needs in terms of testing.

1. What is the PCB material?
2. What is the PCB stack?
3. What is the transmission line structure?
4. On what layer or layers will signals be routed?
5. For signals on internal layers, will signal vias be back-drilled or blind?
6. If the signal vias will be back-drilled, what is the longest possible stub length?
7. What is the desired performance (typically return loss or VSWR) for the test connector and launch?

Regarding question 7, I would define a “good” launch as a connector with a return loss of 20dB or better at the maximum frequency of interest.  Additionally, I would define the bandwidth of a launch as the maximum frequency at which the return loss crosses 20dB.

In PCB design, we typically see three type of vias—through-hole, back-drilled and blind vias.  The open circuit stub of a back-drilled via must not be overlooked when a system bandwidth needs to be maximized.

Do you want to learn more?  I direct you to a recent Molex white paper that presents a relatively simple approach to modeling back-drilled vias and suggests a rough “rule of thumb” for those who do not use or have access to electrical modeling tools. Please click here to access the full white paper.